VTIL
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VTIL
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Instruction Set
General Information
Data movement
Arithmetic
NEG
ADD
SUB
MUL
MULHI
IMUL
IMULHI
DIV
IDIV
REM
IREM
Bitwise
Conditionals
Control Flow
Special Instructions
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REM
Performs an unsigned modulo operation on a register with a register or immediate value. The source value is represented by 2 registers for high and low bits.
Instruction
Operand 1
Operand 2
Operand 3
Description
REM
Reg
Reg/Imm
Reg/Imm
OP1 = [OP2:OP1] % OP3
block
->
rem
(
REG_SP
,
0
,
REG_SP
);
// sets REG_SP to 0
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IDIV
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IREM
Last modified
2yr ago
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